Strategies for cache and local memory management by global program transformation
Journal of Parallel and Distributed Computing - Special Issue on Languages, Compilers and environments for Parallel Programming
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Evaluating Associativity in CPU Caches
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A data locality optimizing algorithm
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Automatic and interactive parallelization
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Tile size selection using cache organization and data layout
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Tolerating latency through software-controlled data prefetching
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Fusion of Loops for Parallelism and Locality
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Data-centric multi-level blocking
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Simplification of array access patterns for compiler optimizations
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A Compiler Optimization Algorithm for Shared-Memory Multiprocessors
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Precise miss analysis for program transformations with caches of arbitrary associativity
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Cache behavior modeling is an important part of modern optimizing compilers. In this paper we present a method to estimate the number of cache misses, at compile time, using a machine independent model based on stack algorithms. Our algorithm computes the stack histograms symbolically, using data dependence distance vectors and is totally accurate when dependence distances are uniformly generated. The stack histogram models accurately fully associative caches with LRU replacement policy, and provides a very good approximation for set-associative caches and programs with non-constant dependence distances.The stack histogram is an accurate, machine-independent metric of locality. Compilers using this metric can evaluate optimizations with respect to memory behavior. We illustrate this use of the stack histogram by comparing three locality enhancing transformations: tiling, data shackling and the product-space transformation. Additionally, the stack histogram model can be used to compute optimal parameters for data locality transformations, such as the tile size for loop tiling.