Achieving Fault Secureness in Parity Prediction Arithmetic Operators: General Conditions and Implementations

  • Authors:
  • M. Nicolaidis;S. Manich;J. Figueras

  • Affiliations:
  • Reliable Integrated Systems Group, TIMA, France;Universitat Politecnica de Catalunya, Spain;Universitat Politecnica de Catalunya, Spain

  • Venue:
  • EDTC '96 Proceedings of the 1996 European conference on Design and Test
  • Year:
  • 1996

Quantified Score

Hi-index 0.00

Visualization

Abstract

Parity prediction arithmetic operator schemes have the advantage to be compatible with data paths and memory systems checked by parity codes. Nevertheless, the basic drawback of these schemes is that they may not be fault secure for single faults, since they propagate to multiple output errors that are undetectable by the parity code. In this paper we derive necessary and sufficient conditions for parity prediction arithmetic operators to achieve the fault secure property. From these conditions, various fault secure designs for arithmetic operators are reported.