Computer Arithmetic: Principles, Architecture and Design
Computer Arithmetic: Principles, Architecture and Design
EDTC '96 Proceedings of the 1996 European conference on Design and Test
A tool for automatic generation of self-checking data paths
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
A CAD framework for generating self-checking multipliers based on residue codes
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Fault-Secure Parity Prediction Arithmetic Operators
IEEE Design & Test
Comparative Study on Self-Checking Carry-Propagate Adders in Terms of Area, Power and Performance
PATMOS '00 Proceedings of the 10th International Workshop on Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation
A Parameterized VHDL Library for On-Line Testing
ITC '97 Proceedings of the 1997 IEEE International Test Conference
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Self-checking designs will gain increasing interest in industrial applications if they satisfy the following requirements: high fault coverage, reduced hardware cost and reduced design effort. This work is aimed to reach these requirements for the design of self-checking shifters and is part of a broader project concerning the design of self-checking data paths.