A tool for automatic generation of self-checking data paths

Authors:
B. Hamdi;H. Bederr;M. Nicolaidis
Affiliations:
-;-;-
Venue:
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
Year:
1995

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Abstract

Abstract: An important drawback of implementing self-checking circuits concerns the lack of dedicated CAD tools. This problem results on a significant increasing of the design effort and compromises the interest of such designs. CAD tools aimed to implement self-checking data paths is of high interest since data-paths are basic parts of microprocessors and microcontrollers. The tools presented here include generators of self-checking adders, ALUs, multipliers, dividers, shifters and register files, as well as generators of parity and double rail checkers. Another tool interconnects these blocks to generate the self-checking data-path.