Application of Ternary Algebra to the Study of Static Hazards
Journal of the ACM (JACM)
Three levels of accuracy for the simulation of different fault types in digital systems
DAC '75 Proceedings of the 12th Design Automation Conference
High-speed fault simulation for UNIVAC 1107 computer system
ACM '68 Proceedings of the 1968 23rd ACM national conference
Verification of timing constraints on large digital systems
25 years of DAC Papers on Twenty-five years of electronic design automation
Generalized discrete event simulation of dynamic systems
Transactions of the Society for Computer Simulation International - Recent advances in DEVS methodology--part II
Dynamic and deductive fault simulation
DAC '78 Proceedings of the 15th Design Automation Conference
Verification of timing constraints on large digital systems
DAC '80 Proceedings of the 17th Design Automation Conference
Methods for generalized deductive fault simulation
DAC '80 Proceedings of the 17th Design Automation Conference
SILOG: A practical tool for large digital network simulation
DAC '79 Proceedings of the 16th Design Automation Conference
An accurate model for ambiguity delay simulation
EURO-DAC '90 Proceedings of the conference on European design automation
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The authors propose a three valued model for temporal simulation of logic system. This model is well suited for analysis of hazards and high frequency rejection phenomenas. By using a new temporal model, we avoid backtracking or anticipation techniques (generally used in other models) and allow very simple implementation. The model and the mains algorithms are presented in detail in the paper and some examples including hazards are given.