Verification of timing constraints on large digital systems
25 years of DAC Papers on Twenty-five years of electronic design automation
Star's envoling design environment: a user's perspective on CAE
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Vector coding techniques for high speed digital simulation
DAC '81 Proceedings of the 18th Design Automation Conference
An integrated system for interactive editing of schematics, logic simulation and PCB layout design
DAC '78 Proceedings of the 15th Design Automation Conference
Design verification and performance analysis
DAC '78 Proceedings of the 15th Design Automation Conference
Multi-sim, a dynamic multi-level simulator
DAC '78 Proceedings of the 15th Design Automation Conference
Verification of timing constraints on large digital systems
DAC '80 Proceedings of the 17th Design Automation Conference
DAC '82 Proceedings of the 19th Design Automation Conference
Developments in computer simulation of gate level physical logic
DAC '79 Proceedings of the 16th Design Automation Conference
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Large scientific computers containing 2 million gates can be simulated using a combination of block simulation and gate simulation of 450, 00O gates.