Simulation study of cached RAID5 designs

  • Authors:
  • R. Treiber;J. Menon

  • Affiliations:
  • -;-

  • Venue:
  • HPCA '95 Proceedings of the 1st IEEE Symposium on High-Performance Computer Architecture
  • Year:
  • 1995

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Abstract

This paper considers the performance of cached RAID5 using simulations that are driven by database I/O traces collected at customer sites. This is in contrast to previous performance studies using analytical modelling or random-number simulations. We studied issues of cache size, disk buffering, cache replacement policies, cache allocation policies, destage policies and striping. Our results indicate that: read caching has considerable value; a small amount of cache should be used for writes fast write logic can reduce disk utilization for writes by an order of magnitude; priority queueing should be supported at the disks; disk buffering prefetch should be used; for large caches, it pays to cache sequentially accessed blocks; RAID5 with cylinder striping is superior to parity striping.