AVPGEN—a test generator for architecture verification
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Digital Technical Journal - Special 10th anniversary issue
ParaSol: a multithreaded system for parallel simulation based on mobile threads
WSC '95 Proceedings of the 27th conference on Winter simulation
IVC '95 Proceedings of the 4th IEEE International Verilog HDL Conference
A BNF-based automatic test program generator for compatible microprocessor verification
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automatic functional test program generation for microprocessor verification
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
An efficient control-oriented coverage metric
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
A coverage metric for the validation of interacting processes
Proceedings of the conference on Design, automation and test in Europe: Proceedings
MCjammer: adaptive verification for multi-core designs
Proceedings of the conference on Design, automation and test in Europe
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The number of computation cycles used for simulation-based verification of multiprocessor systems is outpacing the available throughput of simulation resources. This paper presents an Automaton, a verification framework for multiprocessor systems based on the state space coverage of interacting state machines in the system components. Automaton provides focused verification of those components and minimizes the demand on computing resources while ensuring improved verification coverage at a system level. Automaton makes use of a coverage-based directed-random simulation approach employing a network of workstations. The overall result is a more thorough and efficient system level verification with a given simulation resource.