Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems

Authors:
A. Baghdadi;N-E. Zergainoh;W. Cesario;T. Roudier;A. A. Jerraya
Affiliations:
-;-;-;-;-
Venue:
RSP '00 Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000)
Year:
2000

Citing 0
Cited 5

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Network-on-Chip Modeling for System-Level Multiprocessor Simulation

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Calibration of abstract performance models for system-level design space exploration

Journal of Signal Processing Systems - Special Issue: Embedded computing systems for DSP

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Abstract

In this paper, we present a new methodology to rapidly explore the large design space encountered in hardware/software systems. The proposed methodology is based on a fast and accurate estimation approach. It has been implemented as an extension to a hardware/software codesign flow to enable the exploration of a large number of multiprocessor architecture solutions from the very start of the design process. The effectiveness of this approach is illustrated by a significant application example.