Efficient multisine testing of analog circuits

  • Authors:
  • N. Nagi;A. Chatterjee;A. Balivada;J. A. Abraham

  • Affiliations:
  • -;-;-;-

  • Venue:
  • VLSID '95 Proceedings of the 8th International Conference on VLSI Design
  • Year:
  • 1995

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Abstract

An efficient method has been developed for generating test waveforms for linear analog circuits which minimize the test effort and maximize the test confidence. The method makes use of a fault-based automatic test pattern generator (ATPG) to generate a set of test frequencies. A successive gradient method is used to combine these individual sinusoidal signals in a way that maximizes the fault coverage. The compressed waveform can be stored on-chip and used for built-in test of analog circuits.