A Technology Mapper for Xilinx FPGAs

Authors:
Madhav Y. Chikodikar;Shridhar Laddha;Ashish Sirasao
Affiliations:
-;-;-
Venue:
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Year:
1997

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Abstract

This paper presents a method for area optimal technology mapping for Xilinx FPGAs. The method is modification of the method described and covers uniformly XC2000, XC3000 and XC4000 series of Xilinx FPGAs. The method addresses mapping of combinational and sequential logic onto Xilinx FPGAs. The results compare favorably with the existing mappers and the CLB estimates provided by the mapper are comparable with the CLB count obtained after passing the circuit through Xilinx implementation kit.