Design Space Exploration for Data Path Synthesis

  • Authors:
  • C. A. Mandal;P. P. Chakrabarti;S. Ghose

  • Affiliations:
  • -;-;-

  • Venue:
  • VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
  • Year:
  • 1997

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Abstract

In this paper we examine the multi-criteria optimization involved in scheduling for data path synthesis (DPS). We present a method to find non-dominated schedules using a combination of restricted search and heuristic scheduling techniques. Our method supports design with architectural constraints such as the total number of functional units, buses, etc. The schedules produced have been taken to completion using algorithm GABIND and the results are promising.