Scheduling and binding algorithms for high-level synthesis
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A technology-adaptive allocation of functional units and connections
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A generalized interconnect model for data path synthesis
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Data path allocation using an extended binding model
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Subtype concept of VHDL for synthesis constraints
EURO-DAC '92 Proceedings of the conference on European design automation
Applications of attributed-behavior synthesis
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
A general consistency technique for increasing the controllability of high level synthesis tools
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Design of Testable Multipliers for Fixed-Width Data Paths
IEEE Transactions on Computers
Efficiency improvements for force-directed scheduling
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Simulation-Based Verification for High-Level Synthesis
IEEE Design & Test
Heuristic search based approach to scheduling, allocation and binding in Data Path Synthesis
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
An Enhanced Genetic Solution for Scheduling, Module Allocation, and Binding in VLSI Design
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Design Space Exploration for Data Path Synthesis
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A neural net based self organising scheduling algorithm
EURO-DAC '90 Proceedings of the conference on European design automation
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