Interconnect Optimization Strategies for High-Performance VLSI Designs

Built-in self-test for signal integrity

Proceedings of the 38th annual Design Automation Conference

Signal integrity fault analysis using reduced-order modeling

Proceedings of the 39th annual Design Automation Conference

Signal Integrity: Fault Modeling and Testing in High-Speed SoCs

Journal of Electronic Testing: Theory and Applications

Testing Interconnects for Noise and Skew in Gigahertz SoCs

ITC '01 Proceedings of the 2001 IEEE International Test Conference

Extending JTAG for Testing Signal Integrity in SoCs

DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

A novel buffer circuit for energy efficient signaling in dual-VDD systems

GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI

Cross talk driven placement

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference

On-Chip Communication Architectures: System on Chip Interconnect

On-Chip Communication Architectures: System on Chip Interconnect

A robust edge encoding technique for energy-efficient multi-cycle interconnect

ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design

A robust edge encoding technique for energy-efficient multi-cycle interconnect

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Data bus swizzling in TSV-based three-dimensional integrated circuits

Microelectronics Journal