A robust edge encoding technique for energy-efficient multi-cycle interconnect

Authors:
Jae-sun Seo;Dennis Sylvester;David Blaauw;Himanshu Kaul;Ram Krishnamurthy
Affiliations:
University of Michigan;University of Michigan;University of Michigan;Intel Corporation;Intel Corporation
Venue:
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Year:
2007

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Abstract

In this paper, we propose a new edge encoding technique to reduce the energy consumption in multi-cycle interconnects. Both average and worst-case energy are reduced by desynchronizing the edges of rising and falling transitions. In a 1.2V 65nm CMOS technology, the approach achieves up to 31% energy reduction with no latency overhead over optimally designed conventional busses due to coupling capacitance reductions. The technique further reduces energy consumption by 38% with iso-throughput at the expense of one-cycle latency. Energy savings are shown to be more robust to process variations than previous techniques.