Field Computation by Moment Methods
Field Computation by Moment Methods
Signal delay in RC tree networks
DAC '81 Proceedings of the 18th Design Automation Conference
Efficient Gate Delay Modeling for Large Interconnect Loads
MCMC '96 Proceedings of the 1996 IEEE Multi-Chip Module Conference (MCMC '96)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of interconnect networks using complex frequency hopping (CFH)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient linear circuit analysis by Pade approximation via the Lanczos process
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The improved T and improved ? Models are proposed for on-chip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeling of on-chip distributed RC interconnects. The applications lead to equivalent circuit models for on-chip interconnects, which are represented by the improved T and improved ? models. By matching the first three moments of an open-ended interconnect, the improved ? model with AWE is consequently obtained, which retains the symmetric structure. The new models for distributed RC interconnects are independent of CMOS gates, and therefore can be directly incorporated into SPICE frames. Numerical experiments show that for current feature sizes, the improved T and improved ? modeling methods can be used to accurately evaluate on-chip interconnect effects, while the computational costs are comparable to the original T and original ? modeling. The presented macromodeling approaches are useful for quick simulation and layout optimization.