Partitioning and reduction of RC interconnect networks based on scattering parameter macromodels
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Efficient full-wave electromagnetic analysis via model-order reduction of fast integral transforms
DAC '96 Proceedings of the 33rd annual Design Automation Conference
A general dispersive multiconductor transmission line model for interconnect simulation in SPICE
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Zeros and passivity of Arnoldi-reduced-order models for interconnect networks
DAC '97 Proceedings of the 34th annual Design Automation Conference
Preservation of passivity during RLC network reduction via split congruence transformations
DAC '97 Proceedings of the 34th annual Design Automation Conference
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Error bounded Padé approximation via bilinear conformal transformation
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Model-reduction of nonlinear circuits using Krylov-space techniques
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Robust rational function approximation algorithm for model generation
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Passive model order reduction of multiport distributed interconnects
Proceedings of the 37th Annual Design Automation Conference
Efficient and passive modeling of transmission lines by using differential quadrature method
Proceedings of the conference on Design, automation and test in Europe
Model order reduction for strictly passive and causal distributed systems
Proceedings of the 39th annual Design Automation Conference
Microelectronic Engineering
Efficient model order reduction via multi-node moment matching
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Rational ABCD Modeling of High-Speed Interconnects
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Efficient Macromodeling for On-Chip Interconnects
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
A Fast Coupling Aware Delay Estimation Scheme Based on Simplified Circuit Model
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Improved model-order reduction by using spacial information in moments
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Closed-form expressions of distributed RLC interconnects for analysis of on-chip inductance effects
Proceedings of the 41st annual Design Automation Conference
Parametric reduced order modeling for interconnect analysis
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Realizable parasitic reduction for distributed interconnects using matrix pencil technique
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Passive Hierarchical Model Order Reduction and Realization of RLCM Circuits
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
A wideband hierarchical circuit reduction for massively coupled interconnects
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Wideband modeling of RF/Analog circuits via hierarchical multi-point model order reduction
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Compact Reduced Order Modeling for Multiple-Port Interconnects
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Design and verification of high-speed VLSI physical design
Journal of Computer Science and Technology
Generic sub-space algorithm for generating reduced order models of linear time varying vlsi circuits
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Sparse and Passive Reduced-Order Interconnect Modeling by Eigenspace Method
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Analytical timing model for inductance-dominant interconnect based on traveling wave propagation
Microelectronics Journal
Analog Integrated Circuits and Signal Processing
Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Efficient simulation of nonuniform transmission lines using integrated congruence transform
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Equivalent-circuit interconnect modeling based on the fifth-order differential quadrature methods
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
| Hi-index | 0.03 |
With increasing miniaturization and operating speeds, loss of signal integrity due to physical interconnects represents a major performance limiting factor of chip-, board- or system-level design. Moment-matching techniques using Pade approximations have recently been applied to simulating modelled interconnect networks that include lossy coupled transmission lines and nonlinear terminations, giving a marked increase in efficiency over traditional simulation techniques. Nevertheless, moment-matching can be inaccurate in high-speed circuits due to critical properties of Pade approximations. Further, moment-generation for transmission line networks can be shown to have increasing numerical truncation error with higher order moments. These inaccuracies are reflected in both the frequency and transient response and there is no criterion for determining the limits of the error. In this paper, a multipoint moment-matching, or complex frequency hopping (CFH) technique is introduced which extracts accurate dominant poles of a linear subnetwork up to any predefined maximum frequency. The method generates a single transfer function for a large linear subnetwork and provides for a CPU/accuracy tradeoff. A new algorithm is also introduced for generating higher-order moments for transmission lines without incurring increasing truncation error. Several interconnect examples are considered which demonstrate the accuracy and efficiency in both the time and frequency domains of the new method