Partitioning and reduction of RC interconnect networks based on scattering parameter macromodels

Authors:
Haifang Liao;Wayne Wei-Ming Dai
Affiliations:
Ultima Interconnect Technology, Inc., Santa Clara, CA and Computer Engineering, University of California, Santa Cruz, CA;Computer Engineering, University of California, Santa Cruz, CA
Venue:
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Year:
1995

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Abstract

This paper presents a linear time algorithm to reduce a large RC interconnect network into subnetworks which are approximated with lower order equivalent RC circuits. The number of RC elements can be reduced between 50% and 90%. Instead of increasing approximation order for a network with large number of ports which will result in inefficiency at best and ill-conditioned matrices at worst, we partition the original network into several subnetworks, each of which is approximated by lower order model. The reduced circuits are guaranteed to be stable. The experiment results show that the number of circuit elements in a reduced network is O(N) for typical clock networks, where N is the number of external ports. The simulation time can be reduced by two to three orders of magnitude while the response of the reduced circuits is within five percent of that of the original circuits.