LAPACK's user's guide
FastHenry: a multipole-accelerated 3-D inductance extraction program
DAC '93 Proceedings of the 30th international Design Automation Conference
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Reduced-order modeling of large linear subcircuits via a block Lanczos algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Integrated circuit substrate coupling models based on Voronoi tessellation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analysis of interconnect networks using complex frequency hopping (CFH)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PRIMA: passive reduced-order interconnect macromodeling algorithm
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Model-reduction of nonlinear circuits using Krylov-space techniques
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Model Order Reduction Techniques for Linear Systems with Large Numbers of Terminals
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Sparse and efficient reduced order modeling of linear subcircuits with large number of terminals
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
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None of the existing network reduction tools preserve passivityfor RLC networks. The loss of passivity can be a serious problembecause simulations of the reduced networks may encounter"time step too small" errors. This paper presents a set oftransformations called "Split Congruence Transformations"(SCT's) which can be used to accurately reduce a RLC networkwhile preserving passivity.