Realizable parasitic reduction for distributed interconnects using matrix pencil technique

  • Authors:
  • Janet Wang;Prashant Saxena;Omar Hafiz;Xing Wang

  • Affiliations:
  • University of Arizona;Intel Corporation;University of Arizona;University of Arizona

  • Venue:
  • Proceedings of the 2004 Asia and South Pacific Design Automation Conference
  • Year:
  • 2004

Quantified Score

Hi-index 0.00

Visualization

Abstract

With the increasing design complexity, integrating realizable reduction techniques into design flows has shown more advantages than the traditional model order reduction methods. In this paper, we propose a realizable parasitic reduction method for RLGC distributed interconnects. The proposed method obatains a reduced order model based on a modified matrix pencil method. By using a set of analytic formulas, this method provides synthesied RLGC elements. This new model is applied to power grid and antena circuits involving triangular input waveforms, lossy transmission lines and discontinuities of interconnects. The results show better reduction ratio than the standard macromodels and good accuracy compared with the theoretical values.