Instruction-level power estimation for embedded VLIW cores
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Cycle-accurate energy consumption measurement and analysis: case study of ARM7TDMI
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Speeding up power estimation of embedded software
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Energy estimation and optimization of embedded VLIW processors based on instruction clustering
Proceedings of the 39th annual Design Automation Conference
Power exploration for embedded VLIW architectures
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Instruction Scheduling for Low Power
Journal of VLSI Signal Processing Systems
Journal of VLSI Signal Processing Systems
SEA: fast power estimation for micro-architectures
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems
Integration, the VLSI Journal - Special issue: Low-power design techniques
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems
Integration, the VLSI Journal - Special issue: Low-power design techniques
Generating power-hungry test programs for power-aware validation of pipelined processors
SBCCI '10 Proceedings of the 23rd symposium on Integrated circuits and system design
A multi-granularity power modeling methodology for embedded processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The increasing diffusion of portable systems, like mobile computers and phones or embedded computing applications has driven the need for power analysis and optimization in digital processors used in these systems. In modern CPUs, power estimation and optimization are "two strongly pattern dependent" problems. This means that the influence of the software in power consumption is very high and a power figure for a whatever processor must be related to the running software program. Based on the recent techniques already described in literature, we propose a new instruction level power analysis approach, that tries to relate the power dissipation to the executed instructions and their operand values.