Architectural considerations for a new generation of protocols
SIGCOMM '90 Proceedings of the ACM symposium on Communications architectures & protocols
ACM SIGOPS Operating Systems Review
Active messages: a mechanism for integrated communication and computation
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
Fbufs: a high-bandwidth cross-domain transfer facility
SOSP '93 Proceedings of the fourteenth ACM symposium on Operating systems principles
Experiences with a high-speed network adaptor: a software perspective
SIGCOMM '94 Proceedings of the conference on Communications architectures, protocols and applications
U-Net: a user-level network interface for parallel and distributed computing
SOSP '95 Proceedings of the fifteenth ACM symposium on Operating systems principles
Exokernel: an operating system architecture for application-level resource management
SOSP '95 Proceedings of the fifteenth ACM symposium on Operating systems principles
Design of Universal Continuous Media I/O
NOSSDAV '95 Proceedings of the 5th International Workshop on Network and Operating System Support for Digital Audio and Video
Design of the APIC: A high performance ATM host-network interface chip
INFOCOM '95 Proceedings of the Fourteenth Annual Joint Conference of the IEEE Computer and Communication Societies (Vol. 1)-Volume - Volume 1
The VuNet desk area network: architecture, implementation, and experience
IEEE Journal on Selected Areas in Communications
Measuring and Optimizing CORBA Latency and Scalability Over High-Speed Networks
IEEE Transactions on Computers
The Design and Performance of a Real-Time CORBA SchedulingService
Real-Time Systems - Special issue on challenges in design and implementation of middlewares for real time systems
Applying a pattern language to develop extensible ORB middleware
Design patterns in communications software
Applying patterns to develop a pluggable protocols framework for ORB middleware
Design patterns in communications software
Supporting high-performance I/O in QoS-enabled ORB middleware
Cluster Computing
COMPSAC '00 24th International Computer Software and Applications Conference
A pipelined memory architecture for high throughput network processors
Proceedings of the 30th annual international symposium on Computer architecture
Efficient operating system support for group unicast
NOSSDAV '05 Proceedings of the international workshop on Network and operating systems support for digital audio and video
Journal of High Speed Networks
On modelling and analysis of receive livelock and CPU utilization in high-speed networks
International Journal of Computers and Applications
Evaluating network processing efficiency with processor partitioning and asynchronous I/O
Proceedings of the 1st ACM SIGOPS/EuroSys European Conference on Computer Systems 2006
Applying optimization principle patterns to design real-time ORBs
COOTS'99 Proceedings of the 5th conference on USENIX Conference on Object-Oriented Technologies & Systems - Volume 5
Cheating the I/O bottleneck: network storage with Trapeze/Myrinet
ATEC '98 Proceedings of the annual conference on USENIX Annual Technical Conference
Making commodity PCs fit for signal processing
ATEC '98 Proceedings of the annual conference on USENIX Annual Technical Conference
Trapeze/IP: TCP/IP at near-gigabit speeds
ATEC '99 Proceedings of the annual conference on USENIX Annual Technical Conference
Performance analysis and comparison of interrupt-handling schemes in gigabit networks
Computer Communications
International Journal of High Performance Computing and Networking
On the accuracy of two analytical models for evaluating the performance of Gigabit Ethernet hosts
Information Sciences: an International Journal
The design of the TAO real-time object request broker
Computer Communications
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We are building a high performance 1.2 Gb/s ATM network interface chip called the APIC (ATM Port Interconnect Controller). In addition to borrowing useful ideas from a number of research and commercial prototypes, the APIC design embraces several innovative features, and integrates all of these pieces into a coherent whole. Some of the novel ideas incorporated in the APIC design include: Protected DMA and Protected I/O, which allow applications to queue data for transmission or reception directly from user-space, effectively bypassing the kernel. This argues for moving the entire protocol stack including the interface device driver into user-space, thereby yielding better latency and throughput performance than kernel-resident implementations. Pool DMA when used with Packet Splitting, is a technique that can be used to build true zero-copy kernel-resident protocol stack implementations, using a page-remapping technique. Finally, Orchestrated Interrupts and Interrupt Demultiplexing are mechanisms used to reduce the frequency of interrupts issued by the APIC. Although many of these ideas have been developed in the context of an ATM network interface, we believe they are also applicable in other contexts. In particular, protected DMA and I/O are promising techniques for improving the performance of several different types of I/O devices.