Support for Debugging in the Alpha 21364 Microprocessor

Authors:
Timothe Litt
Affiliations:
-
Venue:
ITC '02 Proceedings of the 2002 IEEE International Test Conference
Year:
2002

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Abstract

The Alpha 21364 microprocessor consists of 153 million transistors operating at 1.2 GHz. The chip includes essentially all of the logic that previous generations relegated to hundreds of support ASICs, including a large L2 cache, memory controllers and a router. While this integration delivers outstanding performance and reliability, the consequent reduction of visibility in the base design posed significant challenges for debug. This paper describes architectural changes made in anticipation of these challenges, and their effect on the debug of this complex, leading edge design.