Using embedded FPGAs for SoC yield improvement
Proceedings of the 39th annual Design Automation Conference
BIST-Based Delay-Fault Testing in FPGAs
Journal of Electronic Testing: Theory and Applications
A New Reliability-Oriented Place and Route Algorithm for SRAM-Based FPGAs
IEEE Transactions on Computers
Evaluating Different Solutions to Design Fault Tolerant Systems with SRAM-based FPGAs
Journal of Electronic Testing: Theory and Applications
Online fault tolerance for FPGA logic blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
A cost-efficient self-configurable BIST technique for testing multiplexer-based FPGA interconnect
Journal of Electronic Testing: Theory and Applications
Fine grain faults diagnosis of FPGA interconnect
Microprocessors & Microsystems
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We present a Built-In Self-Test (BIST)-based diagnostic approach for the programmable interconnect resources in Field Programmable Gate Arrays (FPGAs) that can be used for either on-line or off-line testing. The technique was originally intended for on-line diagnosis of faultyinterconnect to support fault-tolerant applications. However, the technique has been proven to be an excellent approach for off-line testing and diagnosis as well, providing high-resolutiondiagnostics with the ability to identify the faulty wire segment or programmable switch. We have implemented this BIST-based diagnostic approach on the ORCA series FPGA and present the results of testing and diagnosing known defective FPGAs.1