Generation of high quality non-robust tests for path delay faults
DAC '94 Proceedings of the 31st annual Design Automation Conference
FIRE: a fault-independent combinational redundancy identification algorithm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Identifying sequential redundancies without search
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Delay Testing for Non-Robust Untestable Circuits
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Redundancy Identification Using Transitive Closure
ATS '96 Proceedings of the 5th Asian Test Symposium
Classification and identification of nonrobust untestable path delay faults
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
This paper presents an eficient implication-based approachfor identifying non-robustly untestable path delayfaults. It starts from possible conflicts to find untestablefaults by performing static implication. It is neither path-orientednor space-search based. Experimental results forISCAS'85 benchmark circuits demonstrate that a significantportion of non-robustly untestable path delay faults is identifiedeflciently. The method can be combined easily withATPG-based approaches for path delay testing to yield costeffective methods for path delay faults in large circuits.