Hardware spatial forwarding for widely shared data
Proceedings of the 14th international conference on Supercomputing
Evaluation of queue designs for true fully adaptive routers
Journal of Parallel and Distributed Computing
ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Proceedings of the 3rd ACM/IEEE Symposium on Architecture for networking and communications systems
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Router with centralized buffer for network-on-chip
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Trace-driven optimization of networks-on-chip configurations
Proceedings of the 47th Design Automation Conference
Efficient trace-driven metaheuristics for optimization of networks-on-chip configurations
Proceedings of the International Conference on Computer-Aided Design
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Switch design for interconnection networks plays an important role in the overall performance of multiprocessors and computer networks. In this paper, a new switch design, namely FC-CB, is proposed that offers low average message latency and high throughput over a wide range of input workloads. The FC-CB switch incorporates wormhole routing and virtual channels with a full crossbar connection. Its structure is based on a novel circular buffer design with dynamic allocation. We have performed extensive simulations to compare its performance with other alternatives. Our results show that the proposed design is superior in terms of latency and throughput, especially for heavy input traffic rate and low buffer space.