Synthesis and Optimization of Interface Hardware between IP's Operating at Different Clock Frequencies

  • Authors:
  • Affiliations:
  • Venue:
  • ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
  • Year:
  • 2000

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Abstract

In system-on-a-chip design, interfacing of Intellectual Property (IP) blocks is one of the most important issues. Since different vendors provide most IP's, they have different interface schemes and different operating frequencies. In this paper, we propose a new interface synthesis method that enables one not only to handle the interface between IP's with different operating frequencies but also to minimize the hardware resource required for the interface. We have demonstrated the proposed algorithm by applying it to a real design example, MP3 decoder, and verified the IIS-to-PCI protocol converter on a real hardware system.