Functional verification methodology of Chameleon processor
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Reuse methodology manual: for system-on-a-chip designs
Reuse methodology manual: for system-on-a-chip designs
Fast prototyping: a system design flow applied to a complex system-on-chip multiprocessor design
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Writing testbenches: functional verification of HDL models
Writing testbenches: functional verification of HDL models
Quality-Driven System-on-a-Chip Design
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
A Layered Adaptive Verification Platform for Simulation, Test, and Emulation
IEEE Design & Test
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New tools are getting available on the market that help alleviating the problem and improve the quality of functional verification of today's complex systems. A methodology that makes use of such tools is described and compared to the traditional approach followed in the context of a specific project. The scope is limited to functional verification but spans from block- to system-level.