A Data Compression Technique for Built-In Self-Test
IEEE Transactions on Computers
Parallel Signature Analysis Design with Bounds on Aliasing
IEEE Transactions on Computers
Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Test response compaction using multiplexed parity trees
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Zero-aliasing space compaction using linear compactors with bounded overhead
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Space- and time-oriented compactions are to reduce the output response data width and length of circuits under test for built-in self-test technique. In this paper, the space- and time-oriented compaction techniques are considered together. First, the space-oriented data compaction technique is analyzed. We present a scheme, which can compress the data of k-output circuit into 1-bit signature stream with zero-aliasing and zero-performance-degradation for single stuck-line faults. Based on the investigation of space's odd-sensitized and space's even-sensitized faults of the circuits under test, we discuss the compact methods of space's odd sensitization and space's even sensitization test responses, respectively.The graph coloring is adopted to decrease space compactor overhead. The coloring complexity is greatly decreased owing to only painting the output notes with respect to the space's even-sensitized faults. Next, we take into account of the time-oriented data compaction scheme.We use property that a test vector detects multiple faults in the time's even sensitization response compaction. In the time-oriented compaction approach developed in this paper, a s-bit long data stream can be compressed to an r-bit signature with zero-aliasing, where s r. Experimental results are presented to demonstrate the effectiveness of the proposed space- and time-oriented compaction techniques.