Fault-based automatic test generator for linear analog circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Efficient DC fault simulation of nonlinear analog circuits
Proceedings of the conference on Design, automation and test in Europe
Computer-Aided Analysis of Electronic Circuits: Algorithms and Computational Techniques
Computer-Aided Analysis of Electronic Circuits: Algorithms and Computational Techniques
Analog and Mixed-Signal Benchmark Circuits-First Release
Proceedings of the IEEE International Test Conference
Proceedings of the IEEE International Test Conference
Design for Testability and Built-In Self-Test of Mixed-Signal Circuits: A Tutorial
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Design for testability of mixed signal integrated circuits
ITC'88 Proceedings of the 1988 international conference on Test: new frontiers in testing
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Equivalent faults inhibit fault diagnosis by producing indistinguishable test metric measurements. Removal of conditions causing the equivalence in response exhibited by such faults is necessary if fault diagnosis quality is to be improved. As Design-for-Testability methodology aims to deliver a degree of fault diagnosis substantially greater than that obtainable testing unassisted by on-chip test specific hardware, designing a Design-for-Testability scheme with minimal fault equivalence is an issue to be addressed. Presented is a set of simple and inexpensive tests, applied pre-simulation, for identifying catastrophic resistive component faults that cause numerically equivalent D.C. test node responses. Using a biquadratic notch filter modified with a novel Design-for-Testability scheme, we demonstrate that equivalent fault information is a useful initial measure for assessing the potential increase in fault diagnosis quality obtainable with a Design-for-Testability scheme.