A massively parallel algorithm for fault simulation on the connection machine

Authors:
V. Narayanan;V. Pitchumani
Affiliations:
ECE Department, Syracuse University, Syracuse, NY;ECE Department, Syracuse University, Syracuse, NY
Venue:
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Year:
1989

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Abstract

A massively parallel algorithm for fault simulation on the Connection Machine is presented. This algorithm achieves two to three orders of magnitude speedup over the one presented in [1]. The fault simulation methodology used here is combination of parallel fault simulation [2] and PPSFP [3]. Simulation rates of over 2.7 billion gate evaluations per second have been achieved.