DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Journal of Electronic Testing: Theory and Applications
Embedded fault diagnosis in digital systems with BIST
Microprocessors & Microsystems
Experimental comparison of different diagnosis algorithms in the BIST environment
ASM '07 The 16th IASTED International Conference on Applied Simulation and Modelling
BISD: scan-based built-in self-diagnosis
Proceedings of the Conference on Design, Automation and Test in Europe
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We present a new scan-BIST approach for determiningfailing vectors for fault diagnosis. This approach is based onthe application of overlapping intervals of test vectors to thecircuit under test. Two MISRs are used in an interleavedfashion to generate intermediate signatures, thereby obviatingthe need for multiple test sessions. The knowledge of failingand non-falling intervals is used to obtain a set S of candidatefailing vectors that includes all the actual (true) failing vectors.We present analytical results to determine an appropriateinterval length and the degree of overlap, an upper bound onthe size of S, and a lower bound on the number of true failingvectors; the latter depends only on the knowledge of failingand non-failing intervals. Finally, we describe two pruningprocedures that allow us to reduce the size of S, whileretaining most true failing vectors in S. We presentexperimental results for the ISCAS 89 benchmark circuits todemonstrate the effectiveness of the proposed scan-BISTdiagnosis approach.