On Diagnosing Path Delay Faults in an At-Speed Environment

  • Authors:
  • Ramesh C. Tekumalla;Srikanth Venkataraman;Jayabrata Ghosh-Dastidar

  • Affiliations:
  • -;-;-

  • Venue:
  • VTS '01 Proceedings of the 19th IEEE VLSI Test Symposium
  • Year:
  • 2001

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Abstract

Recent techniques for path delay fault diagnosis have addressed the problem in combinational circuits and sequential circuits. The root cause of a path delay fault test failure is narrowed down to a set of functionally sensitized paths and this set is further reduced by post processing the set of passing tests. In this paper, we present a method for narrowing down the suspects further to a set of segments on the failing functionally sensitized paths. The proposed method is implemented and applied to a set of industrial circuits and it is found to be very effective in determining the defective segments that explain excessive delays along paths.