The Effect of Different Test Sets on Quality Level Prediction: When is 80% better than 90%?
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
So What Is an Optimal Test Mix? A Discussion of the SEMATECH Methods Experiment
Proceedings of the IEEE International Test Conference
Design and implementation of the "G2" PowerPC 603e-embedded microprocessor core
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
Adapting Scan Architectures for Low Power Operation
ITC '00 Proceedings of the 2000 IEEE International Test Conference
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The embedded core testing methodology at AdvancedMicro Devices Inc. involves adopting a disciplined systemfor developing new products with a focus on time tomarket and engineering productivity. A key factor is toachieve high and verifiable fault coverage for designs byclosely adhering to guidelines and by increased testautomation. This paper will address the design for test(DFT) aspects of the methodology, production testing ofembedded CPU cores, and provides some data on completeddesigns.