Non-scan design-for-testability techniques for sequential circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
Non-scan design-for-testability of RT-level data paths
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Enhancing high-level control-flow for improved testability
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Confidence analysis for defect-level estimation of VLSI random testing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Synthesis of Native Mode Self-Test Programs
Journal of Electronic Testing: Theory and Applications - special issue on high-level test synthesis
Test generation for Gigahertz processors using an automatic functional constraint extractor
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A Non-Scan Approach to DFT for Controllers Achieving 100% Fault Efficiency
Journal of Electronic Testing: Theory and Applications - Special Issue on the 7th ASIAN TEST SYMPOSIUM, ATS-98
A non-scan DFT method at register-transfer level to achieve complete fault efficiency
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Low-cost sequential ATPG with clock-control DFT
Proceedings of the 39th annual Design Automation Conference
Improving the proportion of at-speed tests in scan BIST
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Quality-effective repair of multichip module systems
Journal of Systems Architecture: the EUROMICRO Journal - Defect and fault tolerance in VLSI Systems
CrossCheck: An Innovative Testability Solution
IEEE Design & Test
Progress in Design for Test: A Personal View
IEEE Design & Test
Alpha 21164 Manufacturing Test Development and Coverage Analysis
IEEE Design & Test
Estimating the Economic Benefits of DFT
IEEE Design & Test
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Defect level prediction for I_DDQ testing
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A new quality estimation methodology for mixed-signal and analogue ICs
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A methodolgy for characterizing cell testability
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
On the Evaluation of Arbitrary Defect Coverage of Test Sets
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Deception by Design: Fooling Ourselves with Gate-level Models
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Comparing Functional and Structural Tests
ITC '00 Proceedings of the 2000 IEEE International Test Conference
A Study of Bridging Defect Probabilities on a Pentium (tm) 4 CPU
ITC '01 Proceedings of the 2001 IEEE International Test Conference
A Novel Functional Test Generation Method for Processors using Commercial ATPG
ITC '97 Proceedings of the 1997 IEEE International Test Conference
MANUFACTURING PATTERN DEVELOPMENT FOR THE ALPHA 21164 MICROPROCESSOR
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Testability Insertion in Behavioral Descriptions
ISSS '96 Proceedings of the 9th international symposium on System synthesis
A Comparison of Bridging Fault Simulation Methods
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Automatic Functional Test Generation - A Reality
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Embedded X86 Testing Methodology
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Coupling EA and high-level metrics for the automatic generation of test blocks for peripheral cores
Proceedings of the 9th annual conference on Genetic and evolutionary computation
Journal of Electronic Testing: Theory and Applications
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
A study on insuring the full reliability of finite state machine
ICCSA'03 Proceedings of the 2003 international conference on Computational science and its applications: PartII
Generation of compact test sets with high defect coverage
Proceedings of the Conference on Design, Automation and Test in Europe
A test methodology to support an ASEM MCM foundry
ITC'94 Proceedings of the 1994 international conference on Test
A procedural interface to test
ITC'94 Proceedings of the 1994 international conference on Test
Back annotation of physical defects into gate-level, realistic faults in digital ICs
ITC'94 Proceedings of the 1994 international conference on Test
Simulation results of an efficient defect analysis procedure
ITC'94 Proceedings of the 1994 international conference on Test
The effect on quality of non-uniform fault coverage and fault probability
ITC'94 Proceedings of the 1994 international conference on Test
Software-Based Testing for System Peripherals
Journal of Electronic Testing: Theory and Applications
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