IEEE Spectrum
Microprocessor based testing for core-based system on chip
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
On the test of microprocessor IP cores
Proceedings of the conference on Design, automation and test in Europe
The Effect of Different Test Sets on Quality Level Prediction: When is 80% better than 90%?
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
An RT-level fault model with high gate level correlation
HLDVT '00 Proceedings of the IEEE International High-Level Validation and Test Workshop (HLDVT'00)
Native Mode Functional Self-Test Generation for Systems-on-Chip
ISQED '02 Proceedings of the 3rd International Symposium on Quality Electronic Design
Software-Based Self-Testing of Embedded Processors
IEEE Transactions on Computers
Integrating BIST Techniques for On-Line SoC Testing
IOLTS '05 Proceedings of the 11th IEEE International On-Line Testing Symposium
Efficient machine-code test-program induction
CEC '02 Proceedings of the Evolutionary Computation on 2002. CEC '02. Proceedings of the 2002 Congress - Volume 02
A software test program generator for verifying system-on-chips
HLDVT '05 Proceedings of the High-Level Design Validation and Test Workshop, 2005. on Tenth IEEE International
Evolving assembly programs: how games help microprocessor validation
IEEE Transactions on Evolutionary Computation
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Test of peripheral modules has not been deeply investigated by the research community. When embedded in a system on chip, however, peripherals pose accessibility problems that may make traditional test approaches ineffective. In this paper an evolutionary methodology, based upon coverage metrics at high-level, is described to automatically generate test sets for peripheral modules in a SoC. A general-purpose evolutionary tool, able to cultivate composite individuals, has been developed and isused for the test set generation. This tool is described and its basic concepts explained. The method compares favorably with results obtained by hand.