IEEE Spectrum
An IEEE 1149.1-Based Test Access Architecture for ICs with Embedded Cores
Proceedings of the IEEE International Test Conference
Functional Testing of Current Microprocessors (applied to the Intel i860TM)
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Modifying User-Defined Logic for Test Access to Embedded Cores
Proceedings of the IEEE International Test Conference
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
Proceedings of the IEEE International Test Conference
Scan chain design for test time reduction in core-based ICs
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Testing Embedded Cores Using Partial Isolation Rings
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
1.1 Test methodology for embedded cores which protects intellectual property
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
1.3 Parallelism in Structural Fault Testing of Embedded Cores
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
On the test of microprocessor IP cores
Proceedings of the conference on Design, automation and test in Europe
Built-in self-test for signal integrity
Proceedings of the 38th annual Design Automation Conference
Selective-run built-in self-test using an embedded processor
Proceedings of the 12th ACM Great Lakes symposium on VLSI
An ILP Formulation to Optimize Test Access Mechanism in System-on-Chip Testing
ITC '00 Proceedings of the 2000 IEEE International Test Conference
BIST Technique by Equally Spaced Test Vector Sequences
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Re-configurable embedded core test protocol
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A P1500-Compatible Programmable BIST Aapproach for the Test of Embedded Flash Memories
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Fully Automatic Test Program Generation for Microprocessor Cores
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Coupling EA and high-level metrics for the automatic generation of test blocks for peripheral cores
Proceedings of the 9th annual conference on Genetic and evolutionary computation
Proceedings of the 20th annual conference on Integrated circuits and systems design
Scheduling Power-Constrained Tests through the SoC Functional Bus
IEICE - Transactions on Information and Systems
Microprocessor based self schedule and parallel BIST for system-on-a-chip
ICESS'05 Proceedings of the Second international conference on Embedded Software and Systems
Deterministic test vector compression / decompression using an embedded processor
EDCC'05 Proceedings of the 5th European conference on Dependable Computing
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