A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems

A fast and low cost testing technique for core-based system-on-chip

DAC '98 Proceedings of the 35th annual Design Automation Conference

System-chip test strategies

DAC '98 Proceedings of the 35th annual Design Automation Conference

RTL Test Justification and Propagation Analysis for Modular Designs

Journal of Electronic Testing: Theory and Applications - special issue on high-level test synthesis

Microprocessor based testing for core-based system on chip

Proceedings of the 36th annual ACM/IEEE Design Automation Conference

Design of system-on-a-chip test access architectures under place-and-route and power constraints

Proceedings of the 37th Annual Design Automation Conference

A framework for testing core-based systems-on-a-chip

ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design

Optimal test access architectures for system-on-a-chip

ACM Transactions on Design Automation of Electronic Systems (TODAES)

The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based System ICs

Journal of Electronic Testing: Theory and Applications

Scan chain design for test time reduction in core-based ICs

ITC '98 Proceedings of the 1998 IEEE International Test Conference

A structured test re-use methodology for core-based system chips

ITC '98 Proceedings of the 1998 IEEE International Test Conference

A novel test methodology for core-based system LSIs and a testing time minimization problem

ITC '98 Proceedings of the 1998 IEEE International Test Conference

DFT guidance through RTL test justification and propagation analysis

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Testing embedded-core based system chips

ITC '98 Proceedings of the 1998 IEEE International Test Conference

A structured and scalable mechanism for test access to embedded reusable cores

ITC '98 Proceedings of the 1998 IEEE International Test Conference

An ILP Formulation to Optimize Test Access Mechanism in System-on-Chip Testing

ITC '00 Proceedings of the 2000 IEEE International Test Conference

Adapting Scan Architectures for Low Power Operation

ITC '00 Proceedings of the 2000 IEEE International Test Conference

Test Features of a Core-Based Co-Processor Array for Video Applications

ITC '99 Proceedings of the 1999 IEEE International Test Conference

A Hierarchical Infrastructure for SoC Test Management

IEEE Design & Test

2.5D system integration: a design driven system implementation schema

Proceedings of the 2004 Asia and South Pacific Design Automation Conference

Searching for Global Test Costs Optimization in Core-Based Systems

Journal of Electronic Testing: Theory and Applications

Time Domain Multiplexed TAM: Implementation and Comparison

DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

Reusing an on-chip network for the test of core-based systems

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Testing Embedded Sequential Cores in Parallel Using Spectrum-Based BIST

IEEE Transactions on Computers

A concurrent testing method for NoC switches

Proceedings of the conference on Design, automation and test in Europe: Proceedings

Optimization of Dual-Speed TAM Architectures for Efficient Modular Testing of SOCs

IEEE Transactions on Computers

Design and implementation of reconfigurable and flexible test access mechanism for system-on-chip

Integration, the VLSI Journal

2.5-Dimensional VLSI system integration

IEEE Transactions on Very Large Scale Integration (VLSI) Systems