System-chip test strategies

  • Authors:
  • Yervant Zorian

  • Affiliations:
  • Logic Vision, Inc., San Jose, California

  • Venue:
  • DAC '98 Proceedings of the 35th annual Design Automation Conference
  • Year:
  • 1998

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Abstract

A major challenge in realizing core-based system-chips is theadoption of adequate test and diagnosis strategies. This paperfocuses on the current industrial practices in test strategiesfor system-chips. It discusses the challenges in testingembedded cores, the testing requirements for individualcores, and their test access mechanisms. It also covers theintegrated test strategies for system-chips based on reusablecores. In addition to the state-of-the-art practices intestability schemes, this paper covers the currentstandardization efforts for embedded core test interfacemechanisms.