Design and implementation of reconfigurable and flexible test access mechanism for system-on-chip

Authors:
Zahra S. Ebadi;Alireza N. Avanaki;Resve Saleh;Andre Ivanov
Affiliations:
Department of Electrical and Computer Engineering, University of British Columbia, 2356 Main Mall, Vancouver, BC, Canada V6T 1Z4;Department of Electrical and Computer Engineering, University of Tehran, P.O. Box 14395-515, Tehran, Iran;Department of Electrical and Computer Engineering, University of British Columbia, 2356 Main Mall, Vancouver, BC, Canada V6T 1Z4;Department of Electrical and Computer Engineering, University of British Columbia, 2356 Main Mall, Vancouver, BC, Canada V6T 1Z4
Venue:
Integration, the VLSI Journal
Year:
2007

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Abstract

We present a new timing model for latch-controlled sub-systems, referred to as the advanced black box model. The proposed model considers the transparency characteristics of latches in modeling and uses only the constraints on input signals and the characteristics ...