A study on insuring the full reliability of finite state machine

  • Authors:
  • Sunwoong Yang;MoonJoon Kim;JaeHeung Park;Hoon Chang

  • Affiliations:
  • Department of Computing, Graduate School, Soongsil University, Dongjak-Ku, Seoul, Korea;Department of Computing, Graduate School, Soongsil University, Dongjak-Ku, Seoul, Korea;Department of Computing, Graduate School, Soongsil University, Dongjak-Ku, Seoul, Korea;School of Computing, Soongsil University, Dongjak-Ku, Seoul, Korea

  • Venue:
  • ICCSA'03 Proceedings of the 2003 international conference on Computational science and its applications: PartII
  • Year:
  • 2003

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Abstract

In this paper, an efficient non-scan design-for-testability (DFT) method for finite state machine(FSM) is proposed. The proposed method always guarantees short test pattern generation time and complete fault efficiency. It has a lower area overhead than full-scan and other non-scan DFT methods and enables to apply test patterns at-speed. The efficiency of the proposed method is demonstrated using well-known MCNC'91 FSM benchmark circuits.