Orthogonal Scan: Low-Overhead Scan for Data Paths

Design for Testability Techniques at the Behavioraland Register-Transfer Levels

Journal of Electronic Testing: Theory and Applications - special issue on high-level test synthesis

Functional scan chain testing

Proceedings of the conference on Design, automation and test in Europe

A non-scan DFT method at register-transfer level to achieve complete fault efficiency

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference

Synthesis of Scan Chains for Netlist Descriptions at RT-Level

Journal of Electronic Testing: Theory and Applications

An RTL Methodology to Enable Low Overhead Combinational Testing

EDTC '97 Proceedings of the 1997 European conference on Design and Test

High-Level Synthesis for Orthogonal Scan

VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium

DPDAT: DATA PATH DIRECT ACCESS TESTING

ITC '01 Proceedings of the 2001 IEEE International Test Conference

On RTL Scan Design

ITC '01 Proceedings of the 2001 IEEE International Test Conference

H-SCAN+: A Practical Low-Overhead RTL Design-for-Testability Technique for Industrial Designs

ITC '97 Proceedings of the 1997 IEEE International Test Conference

A DFT method for time expansion model at register transfer level

Proceedings of the 44th annual Design Automation Conference

A study on insuring the full reliability of finite state machine

ICCSA'03 Proceedings of the 2003 international conference on Computational science and its applications: PartII

RTL DFT Techniques to Enhance Defect Coverage for Functional Test Sequences

Journal of Electronic Testing: Theory and Applications

A New Design-for-Testability Method Based on Thru-Testability

Journal of Electronic Testing: Theory and Applications