Introduction to queueing networks
Introduction to queueing networks
Congestion avoidance and control
SIGCOMM '88 Symposium proceedings on Communications architectures and protocols
The X-Kernel: An Architecture for Implementing Network Protocols
IEEE Transactions on Software Engineering
A high-performance host interface for ATM networks
SIGCOMM '91 Proceedings of the conference on Communications architecture & protocols
A dynamic network architecture
ACM Transactions on Computer Systems (TOCS)
A pipelined, multiprocessor architecture for a connectionless server for broadband ISDN
IEEE/ACM Transactions on Networking (TON)
Dynamics of TCP traffic over ATM networks
SIGCOMM '94 Proceedings of the conference on Communications architectures, protocols and applications
An architecture for QoS analysis and experimentation
IEEE/ACM Transactions on Networking (TON)
SIGCOMM '97 Proceedings of the ACM SIGCOMM '97 conference on Applications, technologies, architectures, and protocols for computer communication
Connection closures adding application-defined behaviour to network connections
ACM SIGCOMM Computer Communication Review
IEEE/ACM Transactions on Networking (TON)
Switchlets and dynamic virtual ATM networks
Proceedings of the fifth IFIP/IEEE international symposium on Integrated network management V : integrated management in a virtual world: integrated management in a virtual world
Modeling TCP throughput: a simple model and its empirical validation
Proceedings of the ACM SIGCOMM '98 conference on Applications, technologies, architectures, and protocols for computer communication
PLAN: a packet language for active networks
ICFP '98 Proceedings of the third ACM SIGPLAN international conference on Functional programming
ACM Transactions on Computer Systems (TOCS)
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Security Engineering: A Guide to Building Dependable Distributed Systems
Security Engineering: A Guide to Building Dependable Distributed Systems
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
An explicit solution to a tandem queueing model
Queueing Systems: Theory and Applications
An analytical solution for a tandem queue with blocking
Queueing Systems: Theory and Applications
Large Tandem Queueing Networks with Blocking
Queueing Systems: Theory and Applications
P4: A platform for FPGA implementation of protocol boosters
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Error Control Coding, Second Edition
Error Control Coding, Second Edition
Asymmetric digital subscriber line: interim technology for the next forty years
IEEE Communications Magazine
A survey of active network research
IEEE Communications Magazine
Realizing a foundation for programmability of ATM networks with the binding architecture
IEEE Journal on Selected Areas in Communications
Service-specific control architectures for ATM
IEEE Journal on Selected Areas in Communications
IEEE Journal on Selected Areas in Communications
Design issues for high-performance active routers
IEEE Journal on Selected Areas in Communications
An OS interface for active routers
IEEE Journal on Selected Areas in Communications
Introducing new Internet services: why and how
IEEE Network: The Magazine of Global Internetworking
The SwitchWare active network architecture
IEEE Network: The Magazine of Global Internetworking
A scalable high-performance active network node
IEEE Network: The Magazine of Global Internetworking
Architectural designs for a scalable reconfigurable IP router
Journal of Systems Architecture: the EUROMICRO Journal
An on-demand queue management architecture for a programmable traffic manager
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
| Hi-index | 0.00 |
The goals of performance and flexibility are often at odds in the design of network systems. The tension is common enough to justify an architectural solution, rather than a set of context-specific solutions. The Programmable Protocol Processing Pipeline (P4) design uses programmable hardware to selectively accelerate protocol processing functions. A set of field-programmable gate arrays (FPGAs) and an associated library of network processing modules implemented in hardware are augmented with software support for function selection and composition, and applied to processing-intensive portions of a user-programmable protocol stack. The system is sufficiently flexible to support protocol stacks that are dynamically altered in reaction to changing network conditions or user needs.The P4 can be transparently inserted into a conventional protocol architecture, such as that of TCP/IP. This experimental demonstration shows that the P4's programmability can be used to significantly improve the performance of TCP/IP under operating conditions where the protocol would perform poorly without augmentation. Generalizing from these experiments, the P4 is shown to have many applications as an open platform for implementing adaptive and programmable networks, and has illustrated new security issues that arise in FPGA-based architectures.The P4 and closely-related systems, such as network processors, are attractive architectural solutions to balancing performance and flexibility.