The IBM engineering verification engine
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Logic simulation system using simulation processor (SP)
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Principles of design automatioon system for very large scale computer design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
HAL: A block level HArdware Logic simulator
DAC '83 Proceedings of the 20th Design Automation Conference
The Yorktown Simulation Engine
DAC '82 Proceedings of the 19th Design Automation Conference
Verity—a formal verification program for custom CMOS circuits
IBM Journal of Research and Development - Special issue: IBM CMOS technology
Benchmarking Parallel Processing Platforms: An Applications Perspective
IEEE Transactions on Parallel and Distributed Systems
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This paper describes the EVE Companion Simulator, ECS, a four-valued gate level simulator which compliments a simulation methodology that uses the Engineering Verification Engine, EVE. ECS is, like EVE, a zero- and unit-delay cycle simulator, but unlike EVE, ECS is a software simulator which runs on a general purpose computer. The basic simulation paradigm of ECS is even driven to exploit latency. ECS uses the same design description interface as EVE, enabling an EVE model to be run on either the hardware accelerator or the software simulator. The major use of ECS is in the interactive debug of large models, where the model is run on the hardware accelerator, a checkpoint is taken and then loaded into the software simulator. In this paper, we give an overview of the ECS architecture and simulation technique, and describe how ECS is used in conjunction with EVE.