Carry-Free Addition of Recoded Binary Signed-Digit Numbers
IEEE Transactions on Computers
Generalized Signed-Digit Number Systems: A Unifying Framework for Redundant Number Representations
IEEE Transactions on Computers
Computer arithmetic: algorithms and hardware designs
Computer arithmetic: algorithms and hardware designs
Redundant Binary Booth Recoding
ARITH '95 Proceedings of the 12th Symposium on Computer Arithmetic
Multilevel Reverse-Carry Computation for Comparison and for Sign and Overflow Detection in Addition
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
IEEE Transactions on Circuits and Systems II: Express Briefs
Hi-index | 14.98 |
Abstract--Computer arithmetic operations based on the BSD (Binary Signed-Digit) number representation system lend themselves well to high-speed computations due to the facilitation of limited carry addition/subtraction. In this paper, we propose an area-time efficient method for sign detection in a BSD number system based on optimized reverse tree structure. When compared to other popular approaches, such as the Most Significant Carry detection-based CLA (Carry Look-Ahead) and MRC (Multilevel Reverse Carry) implementations, the proposed method is superior to both area and time costs in VLSI. Synthesis results for different word lengths show that the proposed approach to sign detection in the BSD number system continues to maintain its advantage over area and time measures.