Synthesis of Full-Adder Circuit Using Reversible Logic

  • Authors:
  • Hafiz Hasan Babu;Rafiqul Islam;Syed Mostahed Ali Chowdhury;Ahsan Raja Chowdhury

  • Affiliations:
  • -;-;-;-

  • Venue:
  • VLSID '04 Proceedings of the 17th International Conference on VLSI Design
  • Year:
  • 2004

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Abstract

A reversible gate has the equal number of inputs andoutputs and one-to-one mappings between input vectorsand output vectors; so that, the input vector states can bealways uniquely reconstructed from the output vectorstates. This correspondence introduces a reversible full-addercircuit that requires only three reversible gatesand produces least number of "garbage outputs", that istwo. After that, a theorem has been proposed that provesthe optimality of the propounded circuit in terms ofnumber of garbage outputs. An efficient algorithm isalso introduced in this paper that leads to construct areversible circuit.