Design of a compact reversible binary coded decimal adder circuit
Journal of Systems Architecture: the EUROMICRO Journal
Efficient approaches for designing reversible Binary Coded Decimal adders
Microelectronics Journal
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
On the compact designs of low power reversible decoders and sequential circuits
VDAT'12 Proceedings of the 16th international conference on Progress in VLSI Design and Test
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A reversible gate has the equal number of inputs andoutputs and one-to-one mappings between input vectorsand output vectors; so that, the input vector states can bealways uniquely reconstructed from the output vectorstates. This correspondence introduces a reversible full-addercircuit that requires only three reversible gatesand produces least number of "garbage outputs", that istwo. After that, a theorem has been proposed that provesthe optimality of the propounded circuit in terms ofnumber of garbage outputs. An efficient algorithm isalso introduced in this paper that leads to construct areversible circuit.