Hierarchical test generation under intensive global functional constraints
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Test Synthesis with Alternative Graphs
IEEE Design & Test
MUSTC-Testing: Multi-Stage-Combinational Test scheduling at the Register-Transfer Level
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
A hierarchical environment for interactive test engineering
ITC'94 Proceedings of the 1994 international conference on Test
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