EFFICIENT THERMAL SIMULATION FOR RUN-TIME TEMPERATURE TRACKING AND MANAGEMENT
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Fast thermal simulation for architecture level dynamic thermal management
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Adaptive multi-domain thermal modeling and analysis for integrated circuit synthesis and design
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Efficient power modeling and software thermal sensing for runtime temperature monitoring
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Full-chip thermal analysis for the early design stage via generalized integral transforms
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Full-chip thermal analysis for the early design stage via generalized integral transforms
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A new technique of multi-layer thermal analysis for VLSI chips
MMACTEE'07 Proceedings of the 9th WSEAS international conference on Mathematical methods and computational techniques in electrical engineering
Hi-index | 0.00 |
With the growing power dissipation in modern high performance VLSI designs, nonuniform temperature distribution and limited heat-conduction capability have caused thermal inducedperformance and reliability degradation. However, the problem modeled by finite difference method for interconnect reliability analysis has huge size if we require the resolution with wirewidth. In addition, the generated lumped circuit has significant number of input sources, and the bottleneck of traditional model reduction methods is the big number of input ports. In this paper, we propose a method of SPICE-compatible thermal simulation for interconnect reliability analysis. The lumped thermal circuit modeling with adaptive approach is used to reduce the problem size. The improved extended Krylov subspace (IEKS) method, independent of the number of input ports, is used for thermal simulation. The experimental results show that our method provides highly accurate results with performance improvement 15脳 over T-Spice for the problem with node number 72428.