Full-chip thermal analysis for the early design stage via generalized integral transforms

  • Authors:
  • Pei-Yu Huang;Yu-Min Lee

  • Affiliations:
  • Department of Communication Engineering, National Chiao Tung University, Hsinchu, Taiwan, R.O.C.;Department of Communication Engineering, National Chiao Tung University, Hsinchu, Taiwan, R.O.C.

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2009

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Abstract

The capability of predicting the temperature profile is critically important for timing estimation, leakage reduction, power estimation, hotspot avoidance and reliability concerns during modern IC design. This paper presents an accurate and fast analytical full-chip thermal simulator for early-stage temperature-aware chip design. By using the generalized integral transforms (GIT), an accurate formulation is derived to estimate the temperature distribution of full-chip with a truncated set of spatial bases which only needs very small truncation points. Then, we develop a fast Fourier transform like evaluating algorithm to efficiently evaluate the derived formulation. Experimental results confirm that the proposed GIT-based analyzer can achieve an order of magnitude speedup compared with a highly efficient Green's function-based thermal simulator. Finally, we propose a 3-D IC thermal simulator and demonstrate its efficiency and accuracy.