An improved direct boundary element method for substrate coupling resistance extraction
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Accurate modeling of substrate resistive coupling for floating substrates
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Properties of digital switching currents in fully CMOS combinational logic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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The finite impedance of silicon substrates has several consequences for the design and performance of ICs. In this paper we discuss the state of the art in the areas of modeling and simulation of these effects. An overview of various modeling techniques is presented, with emphasis on integral-equation based boundary-element techniques. Numerical stability issues related to these techniques are discussed from a physical viewpoint. Impact on circuit design is considered by the means of specific examples.